Morad, M.J.A., Talebiyan, S.R. and Pakniyat, E. 2015. Design of New High-Performance Full Adder Using Hybrid-CMOS Logic Style for High-Speed Applications. Ciência e Natura. 37, (Dec. 2015), 285–290. DOI:https://doi.org/10.5902/2179460X20784.